1. Field of the Invention
The present invention relates to a computer, and more particularly to the configuration of a clock signal source for running the computer. It also relates to a computer having a power saving function.
2. Description of the Prior Art
A conventional clock signal source used in personal computers and the like, as shown in FIG. 8, comprises a combination of a reference oscillator 110 and frequency multipliers 111 and 113 provided within a computer. In FIG. 8, the reference oscillator 110 oscillates at several megahertz and the frequency of an oscillation signal is multiplied tens of times to an appropriate frequency by the first frequency multiplier 111. The multiplied signal is used as a clock signal for a bus 112 within the computer.
The signal multiplied by the first frequency multiplier 111 is multiplied to a higher frequency by the second frequency multiplier 113. The second frequency multiplier 113 is provided within the CPU 114 of the computer. A signal multiplied by the second frequency multiplier 113 is used as a clock signal for a CPU core 114a. 
In some portable battery-powered computers such as notebook size personal computers, if power is on but no operation is performed for a certain period of time, the frequency of a clock signal is reduced to switch to a power save mode, thereby preventing the consumption of the battery.
In the above conventional configuration in which a signal multiplied by the multipliers is used as a clock signal, as shown in FIG. 9, aside from a signal A of a desired frequency (e.g., an output signal of the second multiplier), many unnecessary signals B occur over a wide frequency range. In them, harmonics of signals multiplied by the first or second frequency multiplier are contained. Such unnecessary signals B invade various circuits through the bus within the computer and cause the circuits to malfunction.
Also, the unnecessary signals B leak out of the computer and invade circuits of other devices, causing the circuits to malfunction. Accordingly, the computer should be adequately shielded to prevent unnecessary signals from leaking out of the computer.
Also, as shown in FIG. 8, in the above conventional configuration in which the CPU 114 incorporates the second frequency multiplier 113, the current consumption and heat output of the CPU 114 are large, requiring the CPU 114 to be provided with a heat expelling plate or the like to expel heat.
Also, in the above conventional configuration in which a signal multiplied by the multipliers is used as a clock signal, aside from a signal of a desired frequency, many unnecessary signals occur over a wide frequency range. In them, unnecessary spurious outputted from the first frequency multiplier and unnecessary spurious outputted from the second frequency multiplier are contained.
Such unnecessary signals invade various circuits through a bus or the like within equipment such as a personal computer and cause the circuits to malfunction.
Also, such unnecessary signals are radiated out of the personal computer, causing interference with other electronic devices.
Since the frequency multiplier uses nonlinear characteristics to generate harmonics and takes out of them only harmonics having necessary frequencies, a configuration for switching frequencies is complicated.